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Loop Tiling for Parallelism, Hardcover by Xue, Jingling, Brand New, Free P&P ...
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Item specifics
- Condition
- Book Title
- Loop Tiling for Parallelism
- ISBN
- 9780792379331
- Publication Year
- 2000
- Type
- Textbook
- Format
- Hardcover
- Language
- English
- Publication Name
- Loop Tiling for Parallelism
- Item Height
- 235mm
- Publisher
- Springer
- Item Width
- 155mm
- Subject
- Computer Science
- Item Weight
- 1260g
- Number of Pages
- 256 Pages
About this product
Product Information
Loop tiling, as one of the most important compiler optimizations, is beneficial for both parallel machines and uniprocessors with a memory hierarchy. This book explores the use of loop tiling for reducing communication cost and improving parallelism for distributed memory machines. The author provides mathematical foundations, investigates loop permutability in the framework of nonsingular loop transformations, discusses the necessary machineries required, and presents state-of-the-art results for finding communication- and time-minimal tiling choices. Throughout the book, theorems and algorithms are illustrated with numerous examples and diagrams. The techniques presented in Loop Tiling for Parallelism can be adapted to work for a cluster of workstations, and are also directly applicable to shared-memory machines once the machines are modelled as BSP (Bulk Synchronous Parallel) machines.
Product Identifiers
Publisher
Springer
ISBN-13
9780792379331
eBay Product ID (ePID)
91442080
Product Key Features
Publication Name
Loop Tiling for Parallelism
Format
Hardcover
Language
English
Subject
Computer Science
Publication Year
2000
Type
Textbook
Number of Pages
256 Pages
Dimensions
Item Height
235mm
Item Width
155mm
Volume
575
Item Weight
1260g
Additional Product Features
Series Title
The Springer International Series in Engineering and Computer Science
Country/Region of Manufacture
Netherlands
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Far Corner Europe Limited
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